![]() ![]() ![]() My guess is that the state never goes off from s0. The basic idea in an asynchronous n-bit ripple up counter is to have one toggle flip-flop for each of the n bits. When I run a test cases on it, it somehow only prints s0 and seems to be constant throughout the execution. Answer: Since this sounds like a homework problem I’ll give an explanation first try to implement it yourself first if you can. When control variable is 0, I want to execute s0,s1,s2,s3,s4,s5, and so on as you can see(BCD), and when control variable is 1, I want to execute s0,s1,s3,s2,s6,s7,s5,s4 respectively (gray code) ![]() Parameter s0=3'b000, s1=3'b001, s2=3'b010, s3=3'b011, Verilog File Operations Code Examples Hello World Flops and Latches JK Flip-Flop D Flip-Flop T Flip-Flop D Latch Counters 4-bit counter Ripple Counter Straight Ring Counter Johnson Counter Mod-N Counter Gray Counter Misc n-bit Shift Register Priority Encoder 4x1 multiplexer Full adder Single Port RAM. 2nd state: 001, 3rd state: 010 and so on Reg state // there will be 8 states: 1st state :000 Here is my implementation: module grayBCDcounter( If the input control = 0, the circuit will count in BCD and if the input control = 1, the circuit will count in gray code sequence. I am trying to implement a 8-bit counter that does both BCD(Binary Code decimal) and gray code sequence. ![]()
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